Chris is an Inventor
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E24 Resistors & ASCII
Ecolux progress
Eight DS1822
First byte
gcc: relocation truncated
HardFault and .thumb_func
Maxim 1-wire drivers
Missing GCC cortex-m3
OpenBench Logic Analyser
Test site build out
Transfered
Upverter Schematic
USB Round-trip latency
College Projects
Blimp
PIC Burglar Alarm
Robot Fork Lift
Robot Soccer
FPGA / Electronics
Covered & GTK Wave
Hashtable
Heating Controller
Maximum Counter
Olimex STM32-H103 JTAG
RGB LED Knightrider
Versa: switching Bitstream
Linux / Software
Fedora Tips
Thunderbird: wraping text
Theatre Work
Jack in the box
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Upverter Schematic
edited by Chris Shucksmith
Trial Upverter Schematic
edited by Chris Shucksmith
E24 Resistors & ASCII
edited by Chris Shucksmith
attachment from Chris Shucksmith
OpenBench Logic Analyser
edited by Chris Shucksmith
gcc: relocation truncated
edited by Chris Shucksmith
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FPGA / Electronics
Here are a few Verilog designs I have created while trying to get to grips with FPGA Design, verification and synthesis.
Covered & GTK Wave
Hashtable
Heating Controller
Communication Protocols
Controller Design & State Machine
Maximum Counter
Olimex STM32-H103 JTAG
RGB LED Knightrider
Versa: switching Bitstream
Subpages
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Covered & GTK Wave
Hashtable
Heating Controller
Maximum Counter
Olimex STM32-H103 JTAG
RGB LED Knightrider
Versa: switching Bitstream
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