This is a walk though to showing how to use Lattice ispVM to program a new bit-stream onto the LatticeECP3 Versa evaluation board. The board's JTAG connectivity is provided by the venerable FTDI FT2232H that provides a pair of "Multi-Protocol Synchronous Serial Engine" outputs. Data sheet: http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT2232H.pdf Port A of this chip is wired up to the ECP3's JTAG interface (TCK,TDI,TDO,TMS pins on the schematic). Port B is also connected to the FPGA on general purpose IO lines2 (TXD_UART, RXD_UART, UART_ACT). The Lattice Diamond toolkit comes with a a clunky do-everything device programmer called ispVM. The documentation mentions version 17 while the released software is version 18, and there are non-intuitive differences between the two. And when the "online help" system fires up your browser, it expects to run some clunky IE 5-era Active-X control to load help topics, so that doesn't work, so perhaps this guide will: 1) Plug in the external loop-back USB cable between the Versa board and your machine's USB port. 2) Grab the driver from FTDI If the driver installs OK, Device Manager shows the A and B devices: 3. Time to fire up ispVM, and be greeted by - a Multiple Document Interface. Haven't seen one of those for a while, but FPGA tool vendors seem to love 'em. 4. On the menu-bar, click "Options" --> "Cable and I/O Port Setup". 5. In the Cable and I/O Port Setup window, press "Auto Detect" and hope it finds the following, then hit OK to close the window. 6. Returning to ispVM, you can now press Scan to discover the JTAG chain. After a few seconds of mystery, a new child window appears containing the part number of the Lattice ECP3. 7. Next you are have to change the Operation mode from "Fast Program" to "SPI Flash". 8. To actually change the Device Operation mode you need to double-click the part, or take Edit Device from the popup, to get the "Device Information" window. Here, you will find the "Device Operations" combo box is also missing anything related to SPI, but below that lies the "Device Access Options" combo, where you can set "SPI Flash Background Programming".
9. After choosing "SPI Flash Background Programming", the SPI Serial Flash dialog appears, where the only permitted action is to hit "Select..." to specify the part. 10. The Select Device dialog requires four selections in counter-intuitive order, to match the flash chip on the Versa board, then hit OK 3. 11. You can now use "Browse" to find the bit-stream, perhaps from the Versa samples pacl, then Open, OK, OK, to return to ispVM main window, 12. Finally, you can press GO to perform the download. Just time to check the neat digital clock in the Progress Window. If the bitstream has reconfigured the PCI express endpoint, it's necessary to reboot the machine to trigger a rescan of the PCI configuration space. The reboot also resets the FPGA, causing it to read the updated bitstream. If the devices PCI Vendor/device tuple is unknown to Windows, you will be prompted for drivers. Footnotes 1 Whilst in this operational mode, I don't know if the FPGA's fabric is active or not, ie. are all the design clock domains suspended?."Background Programming" suggests they might be, but how are the flash-loading pins arbitrated, since they can be used in the design? 2 It would be an interesting project to configure a serial port on the FPGA and expose this on the wishbone bus used by the "PCI Express Basic Demo". You could then do terminal loopback by typing into the Java GUI, sending bytes through the JNI wrapper to the C library, out to Versa cards PCI express BAR, into the FPGA fabric, then route those commands over wishbone to the serial port, which would clock the characters into the FTDI2232H Port B, encode them into the FTDI USB transport, send them back to the host over the USB cable, through the FTDI drivers emulated serial port, and back to a terminal on screen. I can see some promising serial ports in Verilog on Opencores.org. 3 I used Greenshot to prepare the screenshots, the numbered red numerals are text glyphs in the Wingdings Font. |
